1. Field of the Invention
The present invention relates to digital circuits and more specifically, to power saving features in precharged bus circuitry.
2. History of the Prior Art
As is generally known to those skilled in the art of digital circuit design, the amount of circuitry required for a bus used for data transfer may be reduced by use of a precharged bus design rather than a non-precharged bus design. Typically, a precharged bus is a bus operated in conjunction with a multi-phase clock, on which data may be driven during a data-drive phase, and which is precharged to a precharge level (i.e., VDD) during a precharge phase. Those skilled in the art, however, have heretofore encountered problems in using the precharged bus when data is latched from the precharged bus to a receiving circuit. One problem has been that during a data-drive phase, precharge signals may be conducted to the receiving circuit through a latch that is enabled before the precharged bus is driven with valid data. Another problem has been that the receiving circuit may receive precharge signals in a data-drive phase during which no data is to be driven on the precharged bus. The propagation of precharge signals through the receiving circuit, "precharge rippling", may result in unnecessary transitions and invalid data at the output of the receiving circuit. The unnecessary transitions cause excess power consumption and additional noise.
Based on the foregoing, it should be perceived that the use of a precharged bus decreases the amount of circuitry required. The use of a precharged bus, however, can result in precharge rippling through the receiving circuit which increases power consumption. There has not heretofore been developed a means or method for eliminating precharge rippling. Accordingly, it should be perceived that it is a shortcoming and deficiency of the prior art that such an apparatus or method has not yet been developed.